1. Field of the Invention
The present invention relates to memory devices, and more particularly, to the stabilization of the sensing speed of sense amplifiers included in memory devices.
2. Description of the Related Art
Generally, semiconductor memory devices include an internal power supply voltage circuit to supply an internal power supply voltage to other circuits associated with the memory devices. An example of a circuit for generating the internal power supply voltage is disclosed in U.S. Pat. No. 6,087,891. The internal power supply voltage is usually generated by reducing the voltage level of the external power supply voltage.
For instance, sense amplifiers included in memory devices use an internally generated develop voltage to develop a voltage between a pair of bit lines. The develop voltage is generated by a develop voltage generator in response to a develop reference voltage from a develop reference voltage generator. The develop voltage generator generates a develop voltage that has a high current level and has the same voltage level as the develop reference voltage.
FIG. 1 is a circuit diagram illustrating a develop reference voltage generator included in a conventional semiconductor memory device. Referring to FIG. 1, the develop reference voltage generator includes a differential amplifier and a voltage divider. The differential amplifier includes two PMOS transistors P1 and P2 connected to a first power supply voltage VDD, and two NMOS transistors N1 and N2 connected to the PMOS transistors P1 and P2, respectively. A reference voltage Vref is applied to a gate of NMOS transistor N1, and an input voltage Vin is applied to a gate of the NMOS transistor N2.
The differential amplifier includes an NMOS transistor N3 coupled between the NMOS transistors N1 and N2 and a second power supply voltage Vss. A predetermined bias voltage is applied to a gate of the NMOS transistor N3 to perform differential amplifying operations. The differential amplifying operations are performed until the first reference voltage Vref and the input voltage Vin become equal to each other. In other words, the input voltage Vin is set to the reference voltage Vref by the differential amplifying operations.
The voltage divider includes a plurality of resistors R1, R2, and R3. The differential amplifier applies the input voltage Vin to the voltage divider between the resistors R1 and R2. A voltage proportional to the input voltage Vin output by the voltage divider as a develop reference voltage Vrefa. For example, when the reference voltage Vref is 1.0 V, the develop reference voltage Vrefa may become 1.2 V by changing the value of the resistors R1, R2, and R3.
A develop voltage generator (not shown) receives the develop reference voltage Vrefa from the develop reference voltage generator and generates a develop voltage that has a high current level and has the same voltage as the develop reference voltage Vrefa. The develop voltage generator provides the develop voltage to a sense amplifier (not shown) for use in sensing operations.
Since the manufacture or processing of sense amplifiers is inconsistent, many sense amplifiers require different levels of develop voltages to operate optimally or with a stable sensing speed. Particularly, sense amplifiers include one or more transistors having threshold voltages that vary depending on their manufacturing process. The develop reference voltage generator shown in FIG. 1, however, provides a uniform develop reference voltage regardless of manufacturing variations. Accordingly, the sensing speeds of the sense amplifiers are unstable in each die of a semiconductor memory device. This problem becomes magnified when attempting to manufacture circuits with low power consumption, thus reducing the allowable voltage difference between the develop voltage and the threshold voltage of the sense amplifier transistors.